Logic device/transceiver/encoder

The MC14049B Hex Inverter/Buffer and MC14050B Non-Inverting Hex Buffer are constructed using MOS P-channel and N-channel enhancement mode devices in a monolithic structure. These complementary MOS devices are primarily used where low power consumption and/or high noise immunity are required. These devices provide logic level translation using only one supply voltage, VDD. The input signal high level (VIH) may exceed the VDD supply voltage for logic level translation. When the device is used as a CMOS-to-TTL/DTL converter (VDD = 5.0 V, VOL <= 0.4 V, IOL >= 3.2 mA), it can drive two TTL/DTL loads. Note that pins 13 and 16 cannot be connected internally to these devices; subsequent connections to these terminals will not affect circuit operation.