Logic device/transceiver/encoder

Single 3-Input, 1.65V to 5.5V OR Gate 6-SON -40 to 125

Octal Transparent D-Latch with 3-State Output 20-TSSOP -40 to 85

The NB4N316M is a differential clock or data receiver that accepts AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL or LVDS. These signals are converted to CML and operate up to 2.0 GHz or 2.5 Gb/s respectively. Therefore, the NB4N316M is suitable for SONET, GigE, Fiber Channel, backside electrodes, and other clock or data distribution applications. The CML output is a 16 mA open collector and requires a resistive load path to the VTT termination voltage. At power-up, the open-collector CML output must be terminated to VTT. The differential outputs produce current-mode logic (CML) compatible levels when loaded by the receiver into 50 Ω or 25 Ω from 1.8 V, 2.5 V, or 3.3 V supplies. This simplifies device interfacing by eliminating the need for coupling capacitors. The NB4N316M has an input threshold of about 25mV, providing higher noise immunity and stability. The device features a small 8-pin TSSOP encapsulation (MSOP-8 compatible).