onsemi (Ansemi)
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MC100LVEL51DTR2G
ECL Differential Clock D-Type Flip-Flop
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Logic Devices > Flip Flops
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The MC100LVEL51 is a differentially clocked D-type flip-flop with reset. This device is functionally equivalent to the EL51 device, but operates from a 3.3V supply. With a propagation delay and output transition time comparable to the EL51, the LVEL51 is ideal for applications requiring the highest AC performance at 3.3V VCC. The reset input is an asynchronous, level-triggered signal. Data enters the master portion of the flip-flop when the clock is low, then transfers to the slave portion, and thus transfers to the output on a positive transition of the clock. The differential clock input of the LVEL51 supports the use of the device as a falling-edge triggered flip-flop. This differential input is clamped for stability under open-circuit input conditions. When left open, the CLK input will be pulled down to VEE and the CLKbar input will be biased at VCC/2.
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